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Digital Baseband

Baseband protocols are evolving to accommodate the increased bandwidth and latency requirements. To satisfy the market demands, baseband infrastructure providers need to build platforms capable of executing unprecedented amounts of signal processing and general purpose computing. One of the biggest challenges all vendors face is how to provide performance without sacrificing the latency and deliver it in a simple design.

The current architecture for base stations falls short of delivering the performance, the low latency and the flexibility customers need. To meet the requirements, wireless equipment providers design complex systems with FPGA, ASIC, DSP and processors with each component requiring special tools in a customized development environment. This leads to a long development cycle, sometimes years, before applications can be productized. Changes in standards also impact providers because such systems are inflexible — making upgrades can be a slow and expensive process.

What providers seek is an uncomplicated, well-designed architecture that yields good performance. Tilera's processors provide a low latency single solution that integrates many functions seamlessly in a single processor and uses standard C/C++ industry tools for  programming their applications. The familiar tools enable customers to preserve their software investments, replace a number of disparate programming methodologies with one standard programming environment, and gain the flexibility they need to support evolving protocols and ever-increasing demands for services.

Providing Digital Baseband Solutions Based on TILE64 Processors

The TILE64™ processor provides a single platform that combines multiple digital baseband functions typically performed by processors, DSPs, and FPGAs.

Multipoint Conferencing Unit Solution Diagram

Digital Baseband block diagram with a single TILE64 processor

Feature Highlights

  • Up to 15 OFDM channels based on the BDTI communications Benchmark (OFDM)™
  • Under 20 watts of power consumption
  • Reduced BoM cost by replacing multiple other processors, FPGAs, and DSPs
  • Simple design that simplifies integration and speeds product development
  • One integrated set of standard tools
    • Standard C/C++
    • Standards-based interfaces
    • Easy to use multicore debugging and profiling