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BDTI Communications Benchmark (OFDM) Results

Berkeley Design Technology, Inc. (BDTI) has Certified the Tilera TILE64™ as the Highest Performance Embedded Processor on its BDTI Communications Benchmark (OFDM)

The Benchmark is based on an orthogonal frequency-division multiplexing (OFDM) receiver. BDTI has confirmed that the TILE64 delivers up to 10X better performance than high-end Digital Signal Processors. The TILE64 running at 866 MHz is able to process 15 channels of BDTI's OFDM benchmark: the highest number ever recorded for a processor.

This benchmark demonstrates the Tile architecture's versatility in providing high performance in signal processing applications in addition to its already proven performance in general compute applications. Coupled with the Tilera tools suite, the performance provided by the architecture is easily achievable for a variety of signal processing markets such as multimedia and wireless infrastructure equipment.

The BDTI benchmark was implemented in C/C++ with a limited number of intrinsics and without any assembly code. The Tilera iMesh™ network and homogenous cores enabled developers to optimize the benchmark on one core and then replicate the exact code onto the others; as a result, the performance scaled linearly as more cores were added. The Tile processors give customers the flexibility they need by allowing them to implement their own algorithms or use standard off-the-shelf software while still obtaining high performance.

BDTI results

The TILE64 processor on the BDTI benchmark surpassed all previously benchmarked processors, providing up to 10X the performance of typical high-end DSPs. Customers using the TILE64 can implement a complete wireless platform integrating signal processing and general compute functions all in one device. This provides customers with significant benefits:

  • The ability to replace a disparate set of tools and programming models with industry-standard tools and standard C/C++ programming
  • The simplification of platform designs, reducing risk and time-to-market
  • The increase in platform compute density, adding more performance per square inch to accommodate growth