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Networking

Networking companies today are caught between conflicting priorities. Their customers are pushing them to add more services and offer more bandwidth, yet they must stay within their power and space restrictions. Similarly, they want to preserve their existing code because of the big investment they've made, yet today's standard processors don't give them the performance they want in their existing power and space budgets.

The performance of the TILE64 Processor gives networking equipment vendors the flexibility to integrate more services and offer them at higher bandwidth without sacrificing the power budget and time to market.

Tilera's innovative TILE64 processors rival the performance of ASIC technology, while providing the standard programming environment of general purpose processors. Tilera provides up to 440 billion operations per second, giving the highest performance on a chip with full-featured cores.

The TILE64 Processor is designed to minimize code modification with support for standard Linux libraries and ANSI standard 'C', enabling networking companies to leverage their existing code and take advantage of the large ecosystem of Linux applications and libraries. This is a significant value given that, in order to get any performance, many chipmakers force vendors to rewrite significant portions of their application code in order to use integrated hardware features and accelerators.

Network Infrastructure

Network Security Appliances

Related Documents

Testimonials

  • “The standard programming model that Tilera offers allows us to re-use our existing code base and rapidly get our applications running on this platform. We have a significant investment in our market-leading software base and Tilera has allowed us to leverage that into our next generation of high-performance products."
    Michael Paquette
    Chief Strategy Officer, Top Layer Networks
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