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TILE-Gx Training Course

This three-day introductory course is designed for engineers and those wanting to become familiar with the Tilera® TILE-Gx many-core architecture. Schedule & Registration

The course includes many hands-on laboratory exercises on Tilera hardware.  Users will work in the Tilera Linux environment, set configuration options, use the software tools and exercise unique TILE-Gx features such as the network processor, mPIPE™. Upon completion of the course, the attendee will have a good understanding of the Tilera TILE-Gx™ architecture, and will be able to use the development tools and APIs effectively. The attendees will also learn a series of techniques that can be utilized to ramp development and maximize performance. Typically the training saves weeks of development time and enables engineers to be much more proficient in using Tilera solutions.

Topics

  • Chip architecture including memory and cache
  • mPipe™ packet acceleration engine
  • MiCA™ crypto and compression acceleration engines
  • The Standard Linux environment
  • Multicore Development Environment™
  • Techniques to maximize performance

Benefits

  • Accelerated development team ramp-up
  • Access to Tilera Product experts who conduct the training sessions
  • Shorter project schedule
  • Lower total development costs
  • Reduced program risk
Schedule and Registration 
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