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TILEPro64 Processor

The TILEPro64™ processor brings multicore computing to the next level, enabling embedded applications with the highest compute performance in the market.

This latest generation processor features 64 identical processor cores (tiles) interconnected with Tilera's iMesh™ on-chip network. Each tile is a complete full-featured processor, including integrated L1 and L2 cache and a non-blocking switch that connects the tile into the mesh. The TILEPro™ family incorporates Tilera’s DDC™ technology (Dynamic Distributed Cache) that accelerates coherent cache performance by a factor of two, compared with other multicores. As with all Tilera® processors, each tile can independently run a full operating system, or multiple tiles taken together can run a multi-processing OS like SMP Linux.

The TILEPro64 processor slashes board real estate and system cost by integrating a complete set of memory and I/O controllers, eliminating the need for an external northbridge or southbridge. This processor delivers scalable performance, power efficiency, and low processing latency in an extremely compact footprint.

With a standard ANSI C and C++ programming environment, developers can leverage their existing software investment as well as utilize the vast body of open source code available. Tiles can be grouped into clusters to apply the appropriate amount of horsepower to each application. Since multiple operating system instances can run on the TILEPro64 simultaneously, it can replace multiple CPU subsystems for both the data plane and control plane.

Applications

Advanced Networking:

The TILEPro64 processor provides the Ethernet line interfaces as well as the entire data plane processing for intelligent network services such as:

Digital Video:

The TILEPro64 processor also excels at digital video processing, easily taking the place of multiple DSPs as well as the networking components for:
  • Unified Threat Management (UTM)
  • Network Security Appliances
  • L4-7 Deep Packet Inspection
  • Network Monitoring & Forensics
  • Media ‘Head-End’ services
  • Video-on-Demand (VoD) Servers
  • Professional Video Editing
  • Audio/Video Transcoding Platforms
  • Video Conferencing

Wireless Infrastructure:

With its flexibility to handle both signal processing and network packet processing, the TILEPro64 processor addresses a range of wireless network applications, including:

  • Base Transceiver Station (BTS)
  • Base Station Controllers (BSC)
  • Wireless Backbone Gateways (GGSN, MGW)
  Feature Enables

Massively Scalable Performance
  • 8 X 8 grid of identical, RISC processor cores (tiles) optimized for both signal processing and general purpose computing
  • 32-bit VLIW processors with 64-bit instruction bundle
  • 5.6 Mbytes of on-chip cache
  • Up to 443 billion operations per second (BOPS)
  • 37 Tbps of on-chip mesh interconnect
  • Up to 50 Gbps of I/O bandwidth
  • 15 Gbps SNORT® processing
  • 20 Gbps iptables (firewall)
  • 20+ Gbps nProbe
  • H.264 HD video encode: 10 streams of 1080p – baseline profile
  • 15+ channels of OFDM baseband receiver processing (wireless)

Power Efficiency
  • 700MHz & 866MHz operating frequency
  • 19 – 23W @ 700MHz all cores active
  • Idle Tiles can be put into low-power sleep mode
  • Power efficient inter tile communications
  • Highest performance per watt
  • Simple thermal management and power supply design
  • Small system form factor
  • Lower operating cost

Integrated Solution
  • Four DDR2 memory controllers with optional ECC
  • Two XAUI configurable MAC or PHY interfaces
  • Two 4-lane 10Gbps PCIe interfaces
  • Two GbE MAC interfaces
  • Flexible I/O interface
  • Reduces BOM cost – standard interfaces included on-chip
  • Dramatically reduced board real estate
  • Direct interface to leading L2-L3 switch vendors

Ease of Programming
  • ANSI standard C / C++ compiler
  • Supports SMP Linux with 2.6 kernel
  • Accelerates pThreaded and shared-memory code
  • iLib™ API's for efficient inter-tile communication
  • Advanced profiling and debugging designed for multicore programming
  • Run off-the-shelf C and C++ programs
  • Leverage investment in existing code
  • Standard multicore communication mechanisms
  • Reduce debug and optimization time
  • Faster time to production code

TILEPro64

TILEPro64™ Processor Block Diagram