Management

Omid Tahernia, President, and Chief Executive Officer

Mr. Tahernia has 24 years of experience in leading organizations providing systems and semiconductor solutions. Prior to Tilera, he spent three years at Xilinx, where he started as Vice President and General Manager of a newly-created DSP Division in 2004 and later served as Vice President and General Manager of the Processing Solutions Group consisting of DSP, Embedded, and IP Divisions. His responsibilities included the business and product strategy for configurable DSP and Embedded processing. Mr. Tahernia served as a member of the Xilinx Executive team during his tenure there.

Prior to Xilinx, Mr. Tahernia spent 21 years at Motorola where he began his career in 1984 and worked in both the equipment and semiconductor segments. In his final role at Motorola Semiconductors, from May 2003 to June 2004, he served as Vice President and Director of Worldwide Strategy and Business Development for the Wireless Group. Prior to that, from 1999 to 2003, he served as Vice President and General Manager of the Wireless and Mobile Systems Division driving a $1B wireless chipset business including baseband and application processors. Mr. Tahernia also held various management positions in the Motorola Paging Group including technology, product development, and licensing. His product management responsibilities included serving international markets of Japan, Asia Pacific and China. Mr. Tahernia was recognized for his engineering excellence and received the Motorola Distinguished Innovator and Patent of the Year awards in 1993 and 1994 respectively.

Mr. Tahernia holds 13 U.S. patents, a B.S. degree in Electrical Engineering from Virginia Polytechnic Institute & State University, and an M.S.EE degree from Georgia Institute of Technology.

Anant Agarwal, Co-Founder and Chief Technology Officer

Dr. Agarwal is also a professor of Electrical Engineering & Computer Science at MIT, and an associate director of the MIT CSAIL Laboratory. Dr. Agarwal served as Associate Director of the MIT Laboratory for Computer Science (LCS) between 1998 and 2003, and was a co-leader of the Oxygen Project. He led a group that developed Sparcle (1992), an early multi-threaded microprocessor based on the SPARC architecture, and the Alewife machine, a scalable shared-memory multiprocessor (1993). At MIT's CSAIL laboratory, Dr. Agarwal led the Raw project, which developed a tiled multicore microprocessor for instruction level parallelism (ILP) and streams (2002). Dr. Agarwal also led the VirtualWires project at MIT. He has been a founder of several successful start-ups, including Virtual Machine Works, Inc. (1993). Dr. Agarwal won the Maurice Wilkes prize for computer architecture in 2001, the Presidential Young Investigator award in 1991, and the Louis D. Smullin Award for teaching excellence at MIT in 2005. Dr. Agarwal holds a bachelor's from IIT Madras (1982) and a Ph.D. (1987) in Electrical Engineering from Stanford University.

Troy Bailey, Vice President of Marketing

Mr. Bailey has more than 20 years of experience in marketing and embedded systems development. Prior to joining Tilera®, he spent four years as Vice President of Marketing Strategy at Shell Energy with responsibility for developing the marketing and sales organizations. Troy started his 10-year career at Motorola in wireless product development. He then joined Motorola's Semiconductor business where he managed the development of Java for embedded systems in partnership with Sun. In his final role at Motorola, he led marketing strategy for wireless semiconductors. Troy holds four patents, a BS in Electrical Engineering from the University of Washington, an MS in Electrical Engineering and Computer Science and a MBA from the Massachusetts Institute of Technology.

Ken Way, Vice President of Worldwide Sales

Mr. Way has over 16 years of semiconductor marketing and sales experience, during which he has consistently succeeded in growing revenue and market share, increasing account penetration, and building sales organizations. During his career in sales, Mr. Way contributed over $3B of lifetime design win pipeline revenue.

Mr. Way joined Tilera in early 2009 as VP of Sales for the Americas territory. Prior to Tilera, he held Senior Sales leadership roles at Cavium Networks and PA-Semi, where he grew the revenue pipeline and put in place sales penetration strategies for strategic accounts and the EMEA territory. He started his career at Motorola Semiconductor (now Freescale) in various engineering and marketing roles. He later joined the sales organization, where he served as the Global Account Director responsible for Cisco Systems, then as Director of US Western Region and overall US National Sales. His highly successful sales teams were recognized by top customers, such as Cisco Systems and Arrow Electronics. He also drove efforts that led to Motorola Semiconductor winning ‘Supplier of the Year’ by Cisco Systems. Mr. Way holds a Degree in Microelectronic Engineering from the Rochester Institute of Technology.

Vijay Aggarwal, Co-Founder and Vice President of Business Development

Mr. Aggarwal joined Tilera in October 2004 with more than 25 years of experience in systems engineering including in all aspects of hardware, software and system architectures. Mr. Aggarwal was the CTO and founder of Gotham Networks where he was responsible for architecture and design of the first network processor-based Multi-Service Switching Platform (MSSP). He was elected to MPLS forum's board. Previously Mr. Aggarwal was a system architect at Nexabit Networks where he was responsible for the first round of terabit router architectures and system design. Nexabit was sold to Lucent Technologies. Mr. Aggarwal has experience with Cisco, Lightream, Cascade, and BBN. He has authored six patents in the area of high speed network processing. Mr. Aggarwal holds a BS in Electrical Engineering from University College Dublin, Ireland.

Nagaraj Murthy, Vice President of Operations

Mr. Murthy has more than 16 years of silicon manufacturing and operational management experience. Most recently he was VP of Operations at Greenfield Networks, which was acquired by Cisco. Mr. Murthy served in senior operational and engineering roles at Silicon Access where he drove the productization of the first 40Gb core networking chipset. Prior to that he was at ATI, through the acquisition of Chromatic research where he was responsible for development and production of multiple generations of graphic chips. Mr. Murthy also was with Sun Microsystems where he was responsible for bringing complex ASICs and the SPARC Microprocessors to market. Mr. Murthy holds a BS in Engineering from Madras University, India, and a MS in Electrical Engineering from the University of Texas, Austin.

John F. Brown III, Vice President of IC Engineering

Mr. Brown has over 25 years of experience in CPU architecture and processor design. Previously, as an AMD Fellow, he led an architecture team targeting the Athlon 64 (for desktop), Turion (for mobile), and Sempron (value mobile/desktop). Prior to that, Mr. Brown was Director of Logic and Architecture at C-Port Corporation, producing the C5 Network Processor. C-Port was acquired by Motorola in 2000. From 1980-1998 John worked at Digital Semiconductor where he contributed to the VAX 8200, VAX 6400, VAX 6600, Alpha 21066, and Alpha 21264 microprocessor designs and architecture, and directed architecture development for future Alpha designs. Mr. Brown managed the design team for the Alpha 21066, the microprocessor powering the Multia MultiClient that won NT desktop product of the year. He holds nine patents and has authored several publications related to CPU architecture and design verification. Mr. Brown holds a BS in Electrical Engineering and a MS in Electrical Engineering from Cornell University.

Richard Schooler, Vice President of Software Engineering

Mr. Schooler has more than 20 years of experience in technical leadership and engineering management in the software industry, primarily in programming language implementation, program transformation, and performance optimization. Before coming to Tilera, he was Director of Windows Build for Microsoft Corporation. Mr. Schooler has served as a Technical Director at VERITAS Software, Vice President of Technology at Geodesic Systems, the Chief Technology Officer for InCert Software, and in project management and software engineering roles at Hewlett Packard, Bolt Beranek & Newman Advanced Computers, and Intermetrics. He has been granted five patents and has published technical papers in compiler implementation and program optimization. Mr. Schooler holds a BS in Computer Science and Mathematics and a MS in Computer Science from the Massachusetts Institute of Technology.